jnicolle.com – 8051 – Altera HDL UP1

jnicolle.com – 8051 – Altera HDL UP1

“I wrote an 8051 CPU emulation core with complete instruction-set support. The core is fast and has been well tested. The Intel MCS-51 BASIC interpreter code runs perfectly as an example, see the example application below. ” – Jean Nicolle

  • The CPU core is fully emulated, all instructions.
  • Interrupts are not emulated (which would be pretty easy to add).
  • On-chip peripherals are not emulated (which would be much more complex to do completely and accurately)

Here are a few designs targeted for Altera’s UP1-board. They are programmed using HDLs (AHDL, VHDL and Verilog HDL). These designs can be useful as demos for the UP1 board and HDL source examples. They emulate some old video games.

Video and VHDL Demo Files for Altera’s UP 1 and UP 2

About delabs

delabs is a web-service for product design and development.
Tagged . Bookmark the permalink.

Comments are closed.